Exemplary embodiments of the present invention relate to semiconductor fabrication technology, and more particularly, to a method for fabricating a storage node contact plug of a semiconductor device including a buried gate.
In a typical gate structure, gates are formed on a substrate, a landing plug contact (LPC) is formed between the gates and coupled to a source/drain, and a storage node contact (SNC) is formed on the landing plug contact and couples a capacitor to the substrate.
As the size of semiconductor devices is being reduced, a buried gate structure is being used. In the buried gate structure, a trench is formed by etching a substrate and a gate is buried in the trench, instead of formed on the substrate.
A semiconductor device to which the buried gate is applied has such a structural characteristic that the LPC may be removed. Therefore, since a distance from a capacitor to a source/drain may be shortened, external resistance (Rext) may be reduced.
However, since the cross-sectional area of the SNC may be excessively reduced by the miniaturization of the device, the external resistance (Rext) may be still high.